Advance Program

**All programs are in JST (UTC+9)

Wed. April 16, 2025
Day 1
13:00-13:20Session I : Welcome & Opening Remarks
13:20-14:10Session II : Keynote Presentation 1 Keynote Chairs: T. Ishihara (Nagoya Univ.) Y. Kobayashi (NEC)
"A Content-Addressable Engine for Associative Processing"
Jose Martinez (Cornell University)
14:10-14:30Break
14:30-15:10Session III : Invited Presentation
Chairs: T. Ueda (IBM Japan) S. Sasaki (Toshiba)
"TBD"
Sangbum Kim (Seoul National University)
15:10-16:45Break
15:30-15:55Session IV : Security
15:30-15:55Vu Trung Duong Le, Hoai Luan Pham, Tuan Hai Vu, Van Duy Tran and Yasuhiko Nakashima
gUniCrypt: Universal Crypto Engine with Optimized Resource Sharing for Security Applications h
15:55-16:20Hsueh Chen, Hsiu-Wei Chen, Shih-Hsu Huang and Po-Yuan Chen
gA High-Performance Hardware Design for Polynomial Multiplication in the CRYSTALS-Kyber Algorithm h
16:20-16:45Ayumi Ohno, Kotaro Shimamura and Shinya Takamaeda-Yamazaki
"Accelerating Elliptic Curve Point Additions on Versal AI Engine for Multi-scalar Multiplication"
16:45-17:35Session V : Keynote Presentation 2 Keynote Chairs: R. Egawa (Tokyo Denki Univ.) H. Iwasaki (TUAT)
"TBD"
Bora Baloglu (Intel Foundry)
Thu. April 17, 2025
Day 2
09:00-09:25Session VI : Memory
Tao Wang, Daqi Lin, Kenshin Yamauchi, Naoko Misawa, Chihiro Matsui and Ken Takeuchi
"Hybrid ReRAM-NMC SRAM-CiM Matrix Multiplication for Large Language Model"
09:25-09:50Mark Lee, Chris Clark and Saibal Mukhopadhyay
"A Compute-in-Memory Ascon Implementation Based on a Novel 11T SRAM Processing Macro"
09:50-10:10Break
10:10-11:00Session VII : Keynote Presentation 3 Keynote Chairs: F. Arakawa (U. of Tokyo) T. Sakata (TIER IV)
"TBD"
Jim Keller (Tenstorrent)
11:00-12:00Poster Session Chairs: Hashimoto
12:00-13:00Lunch
13:00-14:30Special Invited Lecture 1 Chairs: J. Shiomi (Osaka Univ.)
Radiation-hardened circuit design for space application
Alex Orailoglu (UC San Diego)
14:30-14:50Break
14:50-16:20Special Invited Lecture 2 Chairs: J. Shiomi (Osaka Univ.)
Next-Generation Quantum Computing: A Computer Architect's Perspective
16:20-16:40Jangwoo Kim (Seoul National University)
16:40-18:00Session VIII : Panel Discussion Moderator: T. Ishihara (Nagoya Univ.)
Sustainable AI: Emerging Architectures, Devices, and Quantum Computing Towards Future Computing
Fri, April 18, 2025
Day 3
09:00-09:50Session IX: Keynote Presentation 4 Keynote Chairs: Y. Kobayashi (NEC) Y. Inoguchi (JAIST)
Jean-Philippe Fricker (Cerebras Systems, Inc.)
The Challenges of Delivering Power to and Cooling the Cerebras Wafer-Scale Engine
09:50-10:10Break
10:10-11:00Session X: : Reconfigurable logic and system
10:10-10:35Keizo Hiraga, Kenshu Seto, Kazuhiro Bessho and Masahiro Iida
“Proposal for Non-Volatilization of eFPGA Core”
10:35-11:00Heuijee Yun and Daejin Park
“A Power-Efficient Reconfigurable Hybrid CNN-SNN Accelerator for High Performance AI Applications”
11:00-11:20Break
11:20-12:15Session XI : Image processing
11:20-11:45Yi Chen, Malte Wabnitz, Jie Lou, Christian Lanius and Tobias Gemmeke
“GUPA: Group-Wise Uniform Pruning Accelerator for Depthwise Separable Convolution”
11:45-12:00Jihyeon Heo, Soomin Rho, Kwangrae Kim and Ki-Seok Chung
“HOPE: An Efficient Accelerator with Head-wise Overlap Processing for Sparse Attention in Vision Transformer”
12:00-12:15“Exploring the Versal AI Engine for 3D Gaussian Splatting”
12:15-13:35Lunch
13:35-14:35Poster Break Chairs: Hashimoto
14:35-15:25Session XII : Keynote Presentation 5 Keynote Chairs: R. Kobayashi (Science Tokyo) Y. Wada (Meisei Univ.)
Kazutomo Yoshii (Argonne National Lab.)
Specialized Hardware and Open-Source Tools for Scientific Computing and Instruments
15:25-15:45Break
15:45-17:00Session XIII : Circuit design and its environment
15:45-16:10Mebuki Oishi, Sun Tanaka and Shinya Takamaeda-Yamazaki
“RustSFQ: A Domain-Specific Language for SFQ Circuit Design”
16:10-16:35Tomohiro Ueno, Kaito Kitazume, Masato Kiyama, Kazutomo Yoshii, Kento Sato, Norihisa Fujita, Ryohei Kobayashi, Taisuke Boku and Kentaro Sano
"Evaluation of Trade-off between Compression Ratio and Hardware Cost for Adaptive Bandwidth Compression Hardware Platform”
16:35-16:50Hideharu Amano, Atsutake Kosuge, Hirofumi Sumi, Naonobu Shimamoto, Yukinori Ochiai, Yurie Inoue, Tohru Mogami, Yoshio Mita and Makoto Ikeda
“Can the Agile-chip platform carve out a niche between ASICs and FPGAs?”
16:50-17:00Break
17:00-17:50Session XIV : Efficient AI models
17:00-17:25Hiroaki Ito, Jiale Yan, Kazushi Kawamura, Masato Motomura, Thiem Van Chu and Daichi Fujiki
“TTF-GNN: Memory-Efficient GNNs via Tensor Train Decomposition and Network Folding”
17:25-17:50 Nastaran Asadi, Babak Golbabaei, Yirong Kan, Renyuan Zhang and Yasuhiko Nakashima
“A Lightweight Transformer Model With Dynamic Sparse Mask for Neural Machine Translation”
17:50-18:15Session XV : Poster Award and Closing Remarks Chairs: Y. Wada (Meisei Univ.) R. Egawa (Tokyo Denki Univ.)