COOL Chips III
April 24-25, 2000
Kikai-Shinko-Kaikan, Tokyo, JAPAN
Session I : Plenary Session
Co Chairs: Akihiko Morino (NEC), Gensuke Goto (Fujitsu)
Welcome and Opening Remarks
Tadao Nakamura, Organizing Committee Chair
Akira Kubota, MITI, Japan
Yasuhiko Yasuda, General Chair of IEICE
Josep Torrellas, TCCA Vice-Chair of IEEE Computer Society
Keynote Presentation 1
Transmeta's Crusoe: A Low-Power x86-Compatible Microprocessor Built with Software
David R. Ditzel (CEO, Transmeta)
Keynote Presentation 2
Cooler the Better - New Directions in the Nomadic Age -
Tsugio Makimoto (Hitachi)
Keynote Presentation 3
Strategy in an IP Era
Shang-yi Chiang (Vice President R&D, TSMC)
Poster Exhibits and Demonstrations
Chair: Hiroaki Kobayashi (Tohoku Univ.)
Poster 1: Configurable Processing Platforms: Redefining SoC
Cary Ussey (Improv Systems Inc., USA)
Poster 2: Configurable Port Processor Increases Flexibility in the Protocol Processing Area
Tomas Henriksson (Link?pings Universitet, Sweden)
Poster 3: Software Environment for Single-Chip Multi-Processor Merlot (MP98 Ver.1)
Junji Sakai, Yoshiyuki Ito(NEC Corporation, Japan), Masaki Kondo, Hiroyoshi Iizuka, Koji Yoshida, Masayoshi Kai, Akihisa Ikeno, Kenji Suzuki, Satoshi Kato(NEC Informatec Systems, Japan), Masaya Obata, Sunao Torii, Satoshi Matsushita, Naoki Nishi, Masato Edahiro(NEC Corporation, Japan)
Poster 4: Reconfigurable Hardware and its Software Environment for Direct Execution of Dataflow Graphs
Hiroshi Sasaki, Hitoshi Maruyama, Masaaki Kuwata (Tohoku University, Japan), Hideaki Tsukioka, Nobuyoshi, Shoji (Friendly Systems, Japan), Hiroaki Kobayashi, Tadao Nakamura (Tohoku University, Japan)
Poster 5: TATSU - Hardware Accelerator for Public-Key Cryptography Using Montgomery Method
Kohji Takano, Akashi Satoh, and Nobuyuki Ohba (IBM, Japan)
Poster 6: An On-chip Memory-Path Architecture on Merged DRAM/Logic LSIs for High-Performance/Low-Energy Consumption
Koji Inoue, Koji Kai, and Kazuaki Murakami (Kyushu University, Japan)
Poster 7: RHiNET-1/SW: an LSI Switch for a Local Area System Network
Hiroaki Nishi (Real World Computing Partnership, Japan), Koji Tasho (Synergetech Inc., Japan), Tomohiro Kudoh, Junji Yamamoto (Real World Computing Partnership, Japan), Hideharu Amano (Keio University, Japan
Poster 8: MIPS Synthesizable Processor Core Future Product Roadmap/Development Platform
Kazufumi Nakagami (MIPS Technologies, Inc., Japan )
Session II : Mobile Media Processing
Chair: Masatoshi Sekine (Tokyo Univ. of A&T)
Merlot: A Single-Chip Tightly Coupled Four-Way Multi-Thread Processor
Satoshi Matsushita, Sunao Torii, Masahiko Nomura, Toshiaki Inoue, Atsufumi Shibayama, Sachiko Shimada, Taku Osawa, Hiroaki Inoue, Kouichiro Minami, Junji Sakai, Yoshiyuki Ito, Yuichi Nakamura, Masato Edahiro, Naoki Nishi, Masakazu Yamashina (NEC)
High-performance videophone chip with dual multimedia VLIW processor cores
Jeong-Min Kim, Yun-Su Shin, In-Gu Hwang, Kyu-Myoung Lee, Kyung Soo Oh, Kwang-Sun Lee, Sang-Il Han, Soo-Ik Chae (Seoul National University & Inter-university Semiconductor Research Center)
A low power MPEG-4 video/audio codec LSI with 16Mbit embedded DRAM
Noriaki Machida (Toshiba)
Session III : Signal Processing
Chair: Makoto Ikeda (Univ. of Tokyo)
Fully Digital Preambleless 40Mbps QPSK Demodulator for Burst Transmission
Seung-Geun Kim, Youngkou Lee, Sungsoo Choi, Kiseon Kim (KJIST)
Reconfigurable Hardware for Direct Mapping of Dataflow Graphs
Hiroshi Sasaki, Hitoshi Maruyama, Masaaki Kuwata (Tohoku Univ.), Hideaki Tsukioka, Nobuyoshi Shoji (Friendly Systems), Hiroaki Kobayashi, Tadao Nakamura (Tohoku Univ.)
The MDSP (Multimedia DSP) Chip for Portable Multimedia
Hyunjune Yoo, Soohwan Ong, Myung H.Sunwoo (Ajou Univ.)
Session IV : Panel Discussion
Chair: Shuhei Iwade (Mitsubishi)
Moderator: Kazuaki Murakami (Kyushu Univ.)
Panelists:
David R. Ditzel (Transmeta)
Jay Heeb (Intel)
Satoshi Matsuoka (NEC)
April 25, 2000
Invited Presentation 1
Chair: Jun Iwamura (Toshiba)
Next Generation Intel(R) StrongARM(R) Technology Overview
Jay Heeb (Intel)
Invited Presentation 2
System On a Chip and Low Power Technologies for Digital Consumer Electronics
Akira Matsuzawa (Matsushita)
Session VI : Novel Architecture Techniques:
Chair: Shuichi Sakai (Univ. of Tokyo)
RHiNET-1/SW: an LSI switch for a local area system network
Hiroaki Nishi (RWCP), Koji Tasho (Synergetech Inc.), Tomohiro Kudoh, Junji Yamamoto (RWCP), Hideharu Amano (Keio Univ.)
Cooperative Cache System: A Low-Power Cache Structure for Embedded Processor
Gi-Ho Park, Kil-Whan Lee, Jang-Soo Lee, Jung-Hoon Lee, Tack-Don Han, Shin-DugKim, Moon-Key Lee (Yonsei-Univ.), Yong-Chun Kim, Seh-Woong Jeong, Hyung-Lae Roh (Samsung Electronics), Kwang-Yup Lee (Seokyeong Univ.)
MCORE Architecture implements Real-Time Debug Port based on Nexus Consortium Specification
David Ruimy Gonzales (Motorola)
Session VII : General Purpose Microprocessors
Chair: Hiroshi Nakamura (Univ. of Tokyo)
Power Considerations in Dynamic Circuits for a Gigahertz Microprocessor
Osamu Takahashi, Naoaki Aoki, Sang H.Dhong, Peter Hofstee, Nobuo Kojima, Kyung T.Lee, Kevin Nowka, Steve Posluszny Joel Silberman (IBM)
The SH-5/ST50: An Advanced Microprocessor Core for Networking and Multimedia Applications
Kunio Uchiyama (Hitachi)
A 350MHz 5.6GOPS/1.4GFLOPS 4-way VLIW Embedded Microprocessor
Hiroshi Okano, Atsuhiro Suga, Takao Sukemura, Hiromasa Takahashi, Hideo Miyake, Yasuki Nakamura, Yoshimasa Takebe, Yoshio Hirose, Michihide Kimura, Shin-ichiroh Tago, Hitoshi Yoda, Yasuhiro Yamazaki, Masayuki Tsuji, Taizo Satoh, Atsushi Kakurai, Tomoyuki Katayama (Fujitsu)
Session VIII : High Performance Media Processors
Chair: Ryota Kasai (NTT)
Media Core Processor for HD-TV application (MCP2)
Tokuzo Kiyohara (Matsushita)
Task Control Scheme of Video, Audio, and System Encoding with a 162MHz Media-Processor for a Single-Chip Encoder
Hiroshi Segawa, Yoshinori Matsuura, Stefan Scozniovsky, Cheng Ling King, Shu Murayama, Tetsuro Wada, Ayako Harada, Satoshi Kumaki, Tetsuya Matsumura, Ken-ichi Asano, Toyohiko Yoshida (Mitsubishi)
FGA:Geometry Acceleration System with VLIW Processor in 3D Graphics
Young-Su Kwon, Jun-Hee Lee, Yeon-Ho Im, Sung-Jae Byun, Young-Wook Jeon, Sang-Joon Nam, Byoung-Woon Kim, Chong-Min Kyung (KAIST)
Closing Remarks
Eiji Masuda, Program Committee Chair