Here, COOL Chips 22 Final Program [pdf] is uploaded. (As of April 10, 2019)
Wed. April 17, 2019 Main Hall (7th Floor)
| 13:30-15:00 | Special Invited Lecture 1 Chair: Tohru Ishihara (Nagoya Univ.) |
| "Design, Compilation, and Acceleration for Deep Neural Networks in IoT Applications", Deming Chen (University of Illinois at Urbana-Champaign, USA)(Abstract, Bio) |
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| 15:00-15:30 | Break |
| 15:30-17:00 | Special Invited Lecture 2 Chair: Tohru Ishihara (Nagoya Univ.) |
| "Low Power Design: Facts, Myths, and Misunderstandings", Youngsoo Shin (KAIST, Korea) (Abstract, Bio) |
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| 17:00-17:15 | Break |
| 17:15-17:55 | Invited Presentation 1 Co-Chairs: Yoshio Hirose (Fujitsu), Yukinori Sato (Toyohashi Univ. of Tech.) |
| "DLU and Domain Specific Computing" Takumi Maruyama (Fujitsu, Japan)(Abstract, Bio) |
Thu. April 18, 2019 Main Hall (7th Floor)
| 9:30-9:50 | Session I Welcome and Opening Remarks Co-chairs: Yuki Kobayashi (NEC), Hiroki Matsutani (Keio Univ.) |
| Hideharu Amano, Chair of the Organizing Committee Allen J. Baum, Chair of IEEE/CS TCMM Akihiko Kasukawa, President of IEICE/ES |
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| 9:50-10:40 | Session II Keynote Presentation 1 Co-chairs: Masato Suzuki (Socio Next), Kunio Uchiyama (Hitachi) |
| "GPU: A true AI Cool-Chip with High Performance/Power Efficiency and Full-Programmability", Toru Baji (NVIDIA, Japan) (Abstract, Bio) |
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| 10:40-11:00 | Break |
| 11:00-11:50 | Session III Keynote Presentation 2 Co-chairs: Takuya Nakaike (IBM), Hiroki Matsutani (Keio Univ.) |
| "Quantum Computing at IBM ? from hardware to software" Patryk Gumann (IBM, USA) (Abstract, Bio) |
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| 11:50-12:00 | Break |
| 12:00-12:30 | Session IV: Poster Short Speeches Chair: Koji Hashimoto (Fukuoka Univ.) |
| 12:30-13:50 | Lunch Time Break |
| 13:50-14:00 | Poster Open: 7th floor poster show room |
| 14:00-14:50 | Session V Keynote Presentation 3 Co-chairs: Yuki Kobayashi (NEC), Yasuo Unekawa (Toshiba) |
| "Vector Engine Processor of NEC's Brand-New Supercomputer SX-Aurora TSUBASA" Yoshihiro Konno (NEC, Japan) (Abstract, Bio) |
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| 14:50-15:40 | Break (Poster Open: 7th floor poster show room) |
| 15:40-16:55 | Session VI: Cool Software Co-chairs: Hiroyuki Takizawa (Tohoku Univ.), Y. Wada (Meisei Univ) |
| 15:40-16:05 | "The Impacts of Locality and Memory Congestion-aware Thread Mapping on Energy Consumption of Modern NUMA Systems" Mulya Agung, Muhammad Alfian Amrizal, Ryusuke Egawa and Hiroyuki Takizawa (Tohoku Univ.) |
| 16:05-16:30 | "Hybrid Access in Storage-class Memory-aware Low Power Virtual Memory System" Yusuke Shirota, Satoshi Shirai and Tatsunori Kanai (Toshiba) |
| 16:30-16:55 | "A Compiler for Deep Neural Network Accelerators to Generate Optimized Code for a Wide Range of Data Parameters from a Hand-crafted Computation Kernel" Eri Ogawa, Kazuaki Ishizaki, Hiroshi Inoue, Swagath Venkataramani, Jungwook Choi, Wei Wang, Vijayalakshmi Srinivasan, Moriyoshi Ohara and Kailash Gopalakrishnan (IBM research / IBM) |
| 16:55-17:10 | Break |
| 17:10-18:40 | Session VII: Panel Discussions |
| Topics: "Where will the computer architecture go?" Organizer and Moderator: Yasunori Kimura (JST, Japan)(Abstract, Bio) Panelists: Toru Baji (NVIDIA), Deming Chen (Univ. of Illinois at UC), Takumi Maruyama (Fujitsu), and Sanjay Patel (Wave Computing) |
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| 18:40-19:00 | Break |
| 19:00-21:00 | Banquet |
Fri, April 19, 2019 Main Hall (7th Floor)
| 9:30-10:20 | Session VIII Keynote Presentation 4 Co-chairs: Chikafumi Takahashi (Denso), Hideharu Amano (Keio Univ.) | |||
| "Architectures for efficient, low-power AI Edge processing" Sanjay Patel (Wave Computing, USA) (Abstract, Bio) | ||||
| 10:20-10:50 | Break (Poster Open: 7th floor poster show room) | |||
| 10:50-11:45 | Session IX: Machine Learning Co-chairs: S. Sasaki (Toshiba), K. Kawamura (Waseda Univ.) | |||
| 10:50-11:15 | "Post Training Weight Compression with Distribution-based Filter-wise Quantization Step" Shinichi Sasaki, Asuka Maki, Daisuke Miyashita and Jun Deguchi (Toshiba) | |||
| 11:15-11:30 | "Performance and Cost Evaluations of Online Sequential Learning and Unsupervised Anomaly Detection Core" Tomoya Itsubo, Mineto Tsukada and Hiroki Matsutani (Keio Univ.) | |||
| 11:30-11:45 | "Implementing a large application(LSTM) on the multi-FPGA system: Flow-in-Cloud" Yugo Yamauchi, Kazusa Musha and Hideharu Amano (Keio Univ.) | |||
| 11:45-12:35 | Session X: Packet Processing Co-chairs: Hajime Shimada (Nagoya Univ.), K. Shimamura (Hitachi) | |||
| 11:45-12:10 | "Multi-Level Packet Processing Caches" Kyosuke Tanaka, Hayato Yamaki, Shinobu Miwa and Hiroki Honda (U. of Electro-Communications) | |||
| 12:10-12:35 | "Key-value Store Chip Design for Low Power Consumption" Yuta Tokusashi, Hiroki Matsutani and Hideharu Amano (Keio Univ.) | |||
| 12:35-14:00 | Lunch Time Break | |||
| 14:00-14:55 | Session XI: Cache and Memory Systems Co-chairs: Yasutaka Wada (Meisei Univ.), Ryusuke Egawa (Tohoku Univ.) | |||
| 14:00-14:25 | "Cache-Aware Dynamic Classification and Scheduling for Linux" Ravitheja Gollapudi, Gokturk Yuksek and Kanad Ghose (Univ. of New York at Binghamton) | |||
| 14:25-14:40 | "Perceptron-based Cache Bypassing for Way-Adaptable Caches" Masayuki Sato, Yongcheng Chen, Haruya Kikuchi, Kazuhiko Komatsu and Hiroaki Kobayashi (Tohoku Univ.) | |||
| 14:40-14:55 | "Statistical Access Interval Prediction for Tightly Coupled Memory Systems" Robert Wittig, Mattis Hasler, Emil Matus and Gerhard Fettweis (TU Doresden) | |||
| 14:55-15:25 | Break (Poster Open: 7th floor poster show room) | , | ||
| 15:25-16:40 | Session XII: Signal Processing Chair: Makoto Ikeda (Univ. of Tokyo) | |||
| 15:25-15:50 | "Inter-Frame Smart-Accumulation Technique for Long-Range and High-Pixel Resolution LiDAR" Ken Tanabe, Hiroshi Kubota, Akihide Sai and Nobu Matsumoto (Toshiba) | |||
| 15:50-16:15 | "Low Delay 4K 120fps HEVC Decoder with Parallel Processing Architecture" Ken Nakamura, Yuya Omori, Daisuke Kobayashi, Tatsuya Osawa, Takayuki Onishi, Koyo Nitta, Hiroe Iwasaki and Atsushi Shimizu (NTT) | |||
| 16:15-16:40 | "Low Power Speaker Identification using Look Up-free Gaussian Mixture Model in CMOS" Alberto Gianelli, Nick Iliev, Shamma Nasrin, Mariagrazia Graziano and Amit Ranjan Trivedi (Univ. of Illinois at Chicago / Polytechnic Univ. of Turin) | |||
| 16:40-17:00 | Break | |||
| 17:00-17:40 | Session XIII Invited Presentation 2 Co-chairs: Yasushi Inoguchi (JAIST), Koyo Nitta (NTT) | |||
| "A64FX High Performance Processor Architecture and its Design Challenges" Shuji Yamamura (Fujitsu, Japan) (Abstract, Bio) | ||||
| 17:40-18:00 | Poster Award and Closing Remark Makoto Ikeda, Program Committee Co-chair (Univ. of Tokyo) |